- Tytuł:
- Finite-state State Machines Minimization by Using of Values of Input Variables at State Assignment
- Autorzy:
-
Salauyou, V.
Ostapczuk, M. - Tematy:
-
finite state machine (FSM)
programmable gate array (FPGA)
state assignment
area minimization
state splitting - Pokaż więcej
- Wydawca:
- Stowarzyszenie Inżynierów i Techników Mechaników Polskich
- Powiązania:
- https://bibliotekanauki.pl/articles/114436.pdf  Link otwiera się w nowym oknie
- Opis:
- In this paper, we propose a method of FSM synthesis on field programmable gate arrays (FPGAs) when input variables are used for state assignment. For this purpose we offer a combined structural model of class A and class E FSMs. This paper also describes in detail algorithms for synthesis a class AE FSM which consists of splitting of internal states for performance of necessary conditions for synthesis of the class E FSM and state assignment of the class AE FSM. It is shown that the proposed method reduces the area for all families of FPGAs by a factor of 1.19…1.39 on average and by a factor of 3.00 for certain families.
- Dostawca treści:
- Biblioteka Nauki
Artykuł